Data Sheet
ADP2140
Rev. A | Page 25 of 32
capacitor is recommended to help minimize the input voltage
ripple. Use the following equation to determine the minimum
input capacitance:
IN
OUT
IN
OUT
MAX
LOAD
CIN
V
V
V
V
I
I
)
(
)
(
-
?/DIV>
EFFICIENCY
Efficiency is defined as the ratio of output power to input power.
The high efficiency of the ADP2140 has two distinct advantages.
First, only a small amount of power is lost in the dc-to-dc con-
verter package, which in turn, reduces thermal constraints. In
addition, high efficiency delivers the maximum output power
for the given input power, thereby extending battery life in
portable applications.
Power Switch Conduction Losses
Power switch dc conduction losses are caused by the flow of
output current through the P-channel power switch and the
N-channel synchronous rectifier, which have internal resis-
tances (R
DS(ON)
) associated with them. The amount of power
loss can be approximated by
2
_
)
(
_
)
(
_
))
1
(
(
OUT
N
ON
DS
P
ON
DS
COND
SW
I
D
R
D
R
P
?/DIV>
-
?/DIV>
+
?/DIV>
=
where
IN
OUT
V
V
D =
The internal resistance of the power switches increases with
temperature but decreases with higher input voltage.
Inductor Losses
Inductor conduction losses are caused by the flow of current
through the inductor, which has an internal resistance (DCR)
associated with it. Larger size inductors have smaller DCR,
which can decrease inductor conduction losses. Inductor core
losses relate to the magnetic permeability of the core material.
Because the ADP2140 is a high switching frequency dc-to-dc
converter, shielded ferrite core material is recommended for its
low core losses and low EMI.
To estimate the total amount of power lost in the inductor, use
the following equation:
PL = DCR ?/SPAN> IOUT
2
+ Core Losses
Switching Losses
Switching losses are associated with the current drawn by the
driver to turn on and turn off the power devices at the switching
frequency. Each time a power device gate is turned on and
turned off, the driver transfers a charge, 擰, from the input
supply to the gate, and then from the gate to ground.
Estimate switching losses using the following equation:
PSW = (CGATE_P + CGATE_N) ?/SPAN> VIN
2
?fSW
where:
C
GATE_P
is the gate capacitance of the internal high-side switch.
CGATE_N is the gate capacitance of the internal low-side switch.
fSW is the switching frequency.
Transition Losses
Transition losses occur because the P-channel switch cannot
turn on or turn off instantaneously. In the middle of an SW
node transition, the power switch provides all of the inductor
current. The source-to-drain voltage of the power switch is half
the input voltage, resulting in power loss. Transition losses
increase with both load current and input voltage and occur
twice for each switching cycle.
Use the following equation to estimate transition losses:
P
TRAN
= V
IN
/2 ?I
OUT
?(t
r
+ t
f
) ?f
SW
where:
t
r
is the rise time of the SW node.
t
f
is the fall time of the SW node.
RECOMMENDED BUCK EXTERNAL COMPONENTS
The recommended buck external components for use with the
ADP2140 are listed in Table 8 (inductors) and Table 9 (capacitors).
VIN1
PGND
PG
SW
EN1
AGND
EN2
PG
EN1
EN2
FB
VOUT2
10
9
8
7
6
VIN2
1
2
3
4
5
ADP2140
100k&
+
CIN
10礔
+
COUT2
1礔
+
COUT
10礔
IN1
= 3.6
V
OUT2
= 1.8V
1礖
V
OUT
= 1.2
Figure 86. Typical Application Circuit with LDO Connected to Input Voltage
Table 8. 1.0 糎 Inductors
Vendor
Model
Case Size
Dimensions
ISAT (mA)
DCR (m?
Murata
LQM21PN1R0MC0D
0805
2.0 mm ?1.25 mm ?0.5 mm 800
190
Murata
LQM31PN1R0M00L
1206
3.2 mm ?1.6 mm ?0.95 mm 1200
120
Murata
LQM2HPN1R0MJ0
1008
2.5 mm ?2.0 mm ?0.95 mm 1500
90
FDK
MIPSA2520D1R0
2.5 mm ?2.0 mm ?1.0 mm
1200
90
Table 9. 10 糉 Capacitors
Vendor
Type
Model
Case Size
Voltage Rating
Murata
X5R
GRM219R60J106
0805
6.3 V
Taiyo Yuden
X5R
JMK212BJ106
0805
6.3 V
TDK
X5R
C1608X5R0J106
0603
6.3 V
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